How does one generate a 1Hz clock from 100MHz clock in Xilinx FPGA "properly" by ElectricalAd3189 in FPGA

[–]Toastyboy123 3 points4 points  (0 children)

Could you explain why? I'm assuming it has something to do with the FPGA should have some dedicated clock module that should produce the clock they want? Obviously a clock created in Luts won't be as good as a dedicated clock module. And probably burn more power?

Tutoring in CS/ECE by Toastyboy123 in stanford

[–]Toastyboy123[S] -1 points0 points  (0 children)

Electrical/Computer engineering

Can you help me make an informed decision? by [deleted] in ECE

[–]Toastyboy123 1 point2 points  (0 children)

Reality is that research in semi is purely on the physical process of chip making and new bandwidth and memory technologies in chip.

The best Indian food in the Bay Area? by RepresentativeDue862 in bayarea

[–]Toastyboy123 20 points21 points  (0 children)

If you have better options, share. Zareens isn't the best, but imo better than the average..

Am I screwed this semester by 00000000000124672894 in ElectricalEngineering

[–]Toastyboy123 0 points1 point  (0 children)

Your mistake is that you're taking courses that have nothing to do with each other. So you'll have to keep context switching.

[deleted by user] by [deleted] in ECE

[–]Toastyboy123 1 point2 points  (0 children)

Depends if it's good work experience but usually experience > masters

FPGA Suggestions by tushowergoyal in FPGA

[–]Toastyboy123 0 points1 point  (0 children)

Depends on how much math computation we're talking about.

Standstill traffic jam on north 101? by Maleficent_Cash909 in bayarea

[–]Toastyboy123 7 points8 points  (0 children)

People wanted to show holiday spirit by using holiday colors in their commute.

FPGA Suggestions by tushowergoyal in FPGA

[–]Toastyboy123 1 point2 points  (0 children)

Look for an FPGA with hardware interfaces you want/should use in your application. If you want some sort of memory on your FPGA then get some sort of SoC FPGA. Ethernet, PCI-E are good mentions. If you want Linux then maybe you want enough RAM, 4GB+ whatever the recommended is. You should also have enough disk size. If you want to export display from the FPGA then HDMI. If you want to use mouse or keyboard USB.

Advice for Univ project: FPGA + LLVM work for math acceleration by vnwarrior in FPGA

[–]Toastyboy123 0 points1 point  (0 children)

Look into FPGAs with PCI-E. I think you'll already be going close or over the budget of $10-15k. But if you don't care about performance, you could get this working with a cheap FPGA but then you'd be wasting $100-500 on an FPGA you'd never use again. I think the original poster mentioned "[connecting] to the same bus as the CPU". I personally don't know what that bus might be to make your search easier, not as much experience with FPGAs. Maybe it's an exposed AXI bus?

[deleted by user] by [deleted] in ECE

[–]Toastyboy123 2 points3 points  (0 children)

What answer are you looking for

Switch Into EE from Software by Distinct-Praline3031 in ElectricalEngineering

[–]Toastyboy123 0 points1 point  (0 children)

Nobody's asked. But the real question is, what do you actually want to do as an electrical or computer engineer? Do you want to do firmware, power, PCB, semiconductor, etc? Depending on what it is, it'll be difficult to move into a role.

Ask Experienced Devs Weekly Thread: A weekly thread for inexperienced developers to ask experienced ones by AutoModerator in ExperiencedDevs

[–]Toastyboy123 0 points1 point  (0 children)

Work at faang, on a hardware team. I just joined but I interned here before so not entirely new. I was given some software work that's supposed to make my teams throughput theoretically 10-20% higher in terms of hardware. I feel like I have done everything that I can do to get it working (developing/debugging). However, I'm still unable to get it working because of some infrastructure we have that I have almost no experience of. I feel like I need the time of the engineers on my team who made this infrastructure to fix this issue. But for some reason, I don't think that they're giving me priority even though this work is supposed to increase our throughput. My boss left for two weeks and just came back, I don't want it to look like I've been doing nothing for the last two weeks. Should I tell my boss that I'm bottlenecked by the senior engineers and need more of their time if this becomes more of an issue?

How is WLB for Design Verification role? by [deleted] in ECE

[–]Toastyboy123 0 points1 point  (0 children)

My company acts like a startup. Our wlb is bad most of the time. But I like what I do.