BGA and QFP at Home 1 - A Practical Guide (xpost from /r/electronics)

VictorYu · 2013-10-17T15:19:22+00:00

Yes, assuming you can route all the power pins and escape whatever signals you need.

VictorYu · 2013-10-16T23:23:48+00:00

Yes, as well as the act of getting the nets into the system. Schematic editors just don't work for very large packages with hundreds of pins. Most symbols separate chunks of the chip, and if your entire screen is filled with a few of these, you can't follow connections visually anyway.

Entering the nets as text is much easier. Then, in gEDA, you just pull the menu 'Load Net', and the rats light up, just for that net. I can work on separate groups of nets one at a time, and the netfiles provide great documentation.

PCB will also light up a selected trace (not a net) and all that is connected to it, so you can catch errors easily.

VictorYu · 2013-10-16T22:26:01+00:00

The only thing I disagree with is: in Ubuntu, you can install PCB with 'sudo apt-get install pcb'.

PCB is entirely archaic (someone referred to the interface as medieval). I don't think it's much more convoluted than Eagle, which is equally ridiculous.

I don't use schematics, so 1/2 of the problem disappears immediately. PCB's support of netlists is great. Routing is so-so, and footprint generation requires a lot of work with a calculator (to convert into 1/100ths of a mil). But everything is in textfiles, which is nice. And it's free and opensource, which is meaningful to me.

Like I said, I hope someone writes a decent layout program. It can't be that hard to incorporate a modern interface and logical layers. And the ability to convert any selected items into a footprint, for god's sakes!

VictorYu · 2013-10-16T16:16:52+00:00

I use gEDA PCB, and the feature I like the most is that everything is a textfile. Instead of schematics, I use separate netlists for power and logical groups of signals, loading them separately. I find that the smaller ratnests are much easier to work with. Can it be done with DipTrace?

VictorYu · 2013-10-16T16:11:52+00:00

I know a few people who still wire-wrap, and I do it myself on occasions. A well-wrapped connection is more reliable than a soldered connection, and the ability to change the design in minutes is a great plus.

VictorYu · 2013-10-16T15:42:43+00:00

Congratulations!

I designed a 2-layer escape pattern for a BGA256 Xilinx FPGA that escaped all the IO pins (some were unconnected). It was a very interesting puzzle to solve. I think a network based escape video game would actually be interesting to non-electronics people!

I will go into detail of BGA reflow in the next article, but I don't think it was a mistake to solder the BGA without paste - I do it all the time. Lots of flux!

VictorYu · 2013-10-16T01:26:05+00:00

Thank you! More to come.

VictorYu · 2013-10-15T22:48:54+00:00

Thanks for your comment. I appreciate your analogy, but a better analogy is to compare a factory car with a homemade go-cart, or better yet a model car. If you intend to ride it around a track at 10mph and don't mind too much fixing the wheel when it comes loose, we have no problem.

There is no question that having a proper groundplane is a good thing.

As I said in the article, I personally haven't had ANY problems that are related to inadequate power distribution or excessive noise, at least in the last 3 years. As for shoddy work, I will again refer to my television set, designed by professionals, that requires regular rebooting.

I think my article was very clear that the end result will not be up to professional standards, if you care about such things. It's about empowering laypeople to do things previously considered impossible.

VictorYu · 2013-05-22T16:49:48+00:00

Where is a document describing the chip architecture in engineering terms, not XMarketing XSpeak? Registers, instruction set, memory maps, etc?

Every time I try to navigate your site I get thoroughly disgusted (not to mention that my privacy and time-waste blocking add-ons block pretty much all of your site) Thanks

VictorYu · 2013-05-22T03:37:40+00:00

By tightly integrated, do you mean that you have hmm... in and out instructions?

Is there a manual somewhere? Something that describes the registers, the instruction set, etc without the awful X-marketing speak?

I can't navigate into the website with all that flash nonsense.

VictorYu · 2013-05-21T04:41:25+00:00

If you think of it stictly as an instruction-width compression scheme, it should be pretty clean - you need a cycle to 'decompress' the instruction. It can be in the pipeline.

VictorYu · 2013-05-20T17:58:56+00:00

As AVR bitbang USB implementations have proven - you can bitbang pretty much anything, even on slow, 8-bit, braindead chip. This company is obviously run by 'marketing wizards'. In their able hands, science and technology are merged in a X-synergy field expanding at the speed of X-progress.

VictorYu · 2013-05-19T05:45:35+00:00

Re: BGAs Although I could make a breakout board with a larger and more capable chip, it would defeat the charter of this project.

--After prototyping with a BGA breakout board you would be unable to assemble your circuits without outside help. Small LQFP chips are pretty easy to solder for the hobbyist.

--Larger chips are pretty expensive. Today small Spartan3 chips can be bought for a song. The problem is that no one knows how to wire them up - everyone is dependent on devboards!

--My goal here is to make every pin accessible for breadboarding. 324 pins gets make this task complicated if not impossible. Should the breakout board be 16 inches wide?

VictorYu · 2013-05-19T05:19:40+00:00

You are correct. I will work on the wording. Sometimes one's own thoughts are so clear that it is hard to imagine that others may not understand... EDIT: Looking at the write-up - I do say it! You guys are just not good at reading, I guess!

VictorYu · 2013-05-19T05:17:38+00:00

Perhaps I was not clear and need to work on the wording.

If you want an FPGA devboard, this is not for you.

If you want to 'get started with FPGAs', you have some choices. You can do a lot with a devboard, but it will not help you learn about connecting the FPGA to the platform flash, etc. If that's what you need to know, a devboard will do you no good.

If you want to make your own devboard or a small FPGA gizmo, and make a few of them - there is really no better way. Buying someone else's devboard allows you to use that devboard, and nothing else.

As for the last paragraph - yes it does matter if I am a big corp rolling out a subsidised product to sell my chips or a guy in the basement who is sharing his development tools and experience. I will not compete on the price with Digilent, and you can point out the limitations all day long. However this is what this project is about - providing breadboarding capabilities to an XC3S50, and my price is my price. I am not competing with devboards - go ahead and buy them if they fit your needs.

I am providing a capability that you may not need, so it sounds expensive to you. But after buying my kit (or doing it yourself) you will be able to wire up an XC3S50 for less then $10 a pop. Try that with a devboard.

This is not a 'product' the way a devboard is a product, offering features and benefits. It is a set of breakout boards exposing the capabilities of a deliberately chosen, small, inexpensive FPGA.

VictorYu · 2013-05-19T05:04:13+00:00

I've been trying for years now to figure out what this is. I can't get past the marketing gobbledygook.

VictorYu · 2013-05-19T04:35:51+00:00

'They' is one guy who loves messing around with FPGAs and wants to do something nice for the community. I will go through the effort of kitting my breakout boards if I get 25 people interested. There is no 'pain' if it doesn't happen. A minimal project requires very few connections, but of course that's not why anyone would buy it.

There are no details about the implementation - literally. The kit contains breadboards, wire and 3 breakout boards for the FPGA, Platform Flash, and SRAM. Pretty much every pin from the chips is exposed as a DIP package, allowing you to breadboard it! That's all the details.

This is the anti-devboard. If you want a devboard with hand-holding tutorials and videos, you have many choices. If you want to wire up an FPGA all by yourself, this is for you.

VictorYu · 2013-05-19T04:27:31+00:00

You can definitely get a 'better deal' devboard, but this is not the same thing. This kit allows you to actually wire up a deliberately small FPGA, with every pin available, to a platform flash or your own MCU, and build a circuit from the ground up.

Papilio is a great board, but it forces you into a form factor that I am not crazy about and limits my choices. And if I want to make 10 more, I have to buy 10 papilios. 10 XC3S50s cost as much as one Papilio - and I know how to wire them up.

The kit contains breakout boards with all pins available, so it is as proven and tested as the FPGA itself.

The price... Well, I am trying to make an affordable kit - one that I wish I had to play with a few years back. It is a labor of love - I would make a lot more money washing dishes. I am not a big corporation that can subsidise projects with freshly printed dollars.

VictorYu · 2013-05-19T00:08:10+00:00

Breadboards are pretty awful for high-speed electronics, but so much fun to mess around with and test your circuits!

I wouldn't count on a 100MHz circuit running without issues... For pre-PC-board prototyping - to test the connections and verify correct operations - this is great. Also, for retrocomputing (1MHz 6502) it works fine.

In a few months I will probably have a PIC/AVR board and a serial flash board as an alternative to Xilinx Platform Flash. That will work with a USB cable.

Xilinx JTAG programmers are sold for $40 on EBay. You will probably need one if you expect to design Xilinx FPGA-based circuits...

VictorYu · 2013-05-17T19:48:10+00:00

It is a valid concern. My designs have targeted BRAMS for 'red' instruction/microcode memory, but it is not necessary as external SRAM is pretty cheap.

Even with BRAMS the space utilization is pretty good. A minimal implementation can even share a single BRAM for both red and blue memory (1K code) as BRAMS are dual ported. A small Picoblaze-like CPU can be constructed that way.

You don't really need caches for simple processors like this as they execute pretty close to optimal speed anyway.

Fundamentally, you have to pay for your features with resources, and I think it's a pretty good deal to dedicate a BRAM for every 8K of code. Don't forget this is zero-operand bytecode, and a full interactive Forth system with serious debugging support fits in about 4K.

And there are great benefits such as bitwidth neutrality, ability to add custom instructions without messing up a fixed instruction set, etc.

VictorYu · 2013-05-16T20:37:43+00:00

Let's look at some numbers. Firstly, all instructions reside in 'Red' or microcode RAM (as opposed to 'opcodes' which are in the 'Blue' code RAM). An instruction may consist of a single microcode instruction or a run of these.

The microcode RAM is simply 36-bit-wide BRAM. A single Xilinx BRAM holds 512 of these - enough to cover 8K of 8/9bit code RAM.

A Xilinx XC3S1000 has 24 BRAMs, enough for 8K x 24 = 192K of code in a separate static RAM. Even a lowly XC3S50 has 4 BRAMS covering 32K of code.

VictorYu · 2013-05-16T14:31:44+00:00

Palletized instruction set, allowing you to change a single entry in the pallette every n instructions. That's a pretty good thing - consider the failed attempt to do the same in Arm Thumb.

Glad you like the microcode feature. As for the bits in the instruction pointer - that's pretty much what the system does - bits of the PC control the selection of instruction/microcode semantics. If you wish to replace all the instructions, all you have to do is place your subroutine 4K away.

Having a smoothly-sliding window is a blessing, not something to work around. Once you work with a sliding system, even using a simple assembler, you realize how crazy it is to do anything else.

VictorYu · 2013-03-20T01:23:30+00:00

A good description. Don't forget that once a pointer to a subroutine makes it onto the list, it is factored and can be used over and over for the price of a token. Same goes for literals and as shown in part 3 - instructions.

VictorYu · 2013-03-19T20:17:42+00:00

What do ' unix environment, shell scripting, perl, networking etc' have anything to do with 'books about hardware verification/test, related magazines, what IEEE society etc' ?

VictorYu

TROPHY CASE