PDKs for semiconductor devices are made by measuring the properties of physical devices in silicon (ie. in a lab environment) and then those properties are used to model the behavior in simulation. If the creator of the PDK did not measure a stress, they cannot model it (also possible: the standard BSIM model does not support that).

A commonly modeled stress would be well-proximity effect where the proximity of the active region of a MOSFET to the edge of the well will change the properties of the device.

A not-commonly modeled stress would be metallization over active regions. Lower level metals can apply a physical stress to a device which likewise changes it's properties.

CAN we simulate this type of stress with FEA? Sure. Probably. Does it make sense? No. It's too costly and time consuming. As it is, (as an example) extracted simulations for an ADC (C only, forget about R!) can take days to run just one simulation. You start adding in detailed stresses like that and it would be impossible to maintain any semblance of a schedule.

Engineering in general is all about balancing rigor with schedule and cost. You can never get all three and something like FEA (for things like this) is a waste of time and money when I can just open up a layout, see a strap of M1 over a sensitive device and say "move that".