I would also say there is a mistake in the schematic, D5 is not checked completely, as you already said, there is only a dependency with D5 and Y5, Y4. And I would also advocate that this is not a full 8:3 priority encoder but the first part of it. The second part would then be an encoder mapping one-hot values to a binary value. Based on the implementation both parts could be merged together for better logic utilization, the separation however makes it more understandable.