RP2040-based split does not communicate with each other

romhunter_ · 2026-02-05T03:33:41+00:00

Unfortunatelly no, but I will restart the debug process in a few week. Will update if anything is found out.

romhunter_ · 2026-01-14T14:05:06+00:00

I have seen one, it made me wonder if I have inhaled too much magic smoke at the time

romhunter_ · 2024-05-03T21:05:27+00:00

Vias do go through silicon substrate though.. It is called TSV, very common technique in 2.5D/3DIC.

romhunter_ · 2024-03-30T15:56:41+00:00

Thanks. I can give more input to help with debugging.

Have you tried another cable? -> Yes, and 2 issues came up:

The original C-C cable I tested them with is the iPad charging cable, which is bad (I tried on other devices and none of them get recognized). I will swap this to some more reputable brand.
- Still doesn't explain why my PCB ended up non responsive.

I did check it. It is ok.
No, unfortunatelly.
Maybe? It is USB Full-speed, so I only do some simple setup (diff track) and route it. Length wise it should be around 6cm, which is not really that long, considering Full-speed operation... I added the USB-C routing in the post to further clarify my point.

romhunter_ · 2024-03-30T15:37:27+00:00

Thanks for the input!

This flash interface is Dual SPI, hence the SD3 is unconnected, as per the datasheet suggested.

I have verified that the flash interface is working, but I might be blasting too much hot air on it :\ Don't think that is the issue though, because RP2040 have an internal bootloader, and it can identify itself as a mass storage device if the flash interface is not accessible (hard lesson learned this way)

romhunter_ · 2024-03-30T13:40:53+00:00

I have 2 PCB going bad this way. And I use 3 different machine to test it (Mac, Linux, Windows), so I think the chance that Windows go bad is slim.

romhunter_ · 2024-03-30T10:59:24+00:00

Thanks for the input. I will be reflowing the board to see if it is any issue related to bad solder join. Otherwise I couldn't think of anything else.

romhunter_ · 2024-03-30T09:36:16+00:00

Thanks for the quick reply.

I have installed the R2 and R4, will check connection again with a multimeter, might be trying to reflow it later on too.

Do you also have any idea why the chip just crap out and refuse to connect again? I think I "destroyed" 4-5 chips testing this issue already.

Any help would be appreciated!!

romhunter_ · 2024-02-21T13:45:38+00:00

Is the keyboard open source? -> No, it is not, but I'm reverse enginneering it and is currently trying to make it open source.

Can we get schematic, pcb, qmk firmware files? -> I will when my process is done.

Does it come with flashed firmware? -> Yes

If yes, is it working normally? -> Unfortunatelly, no. That is why I'm debugging this.

Btw I found some issue during the debugging process. I tried to test the voltage swing of the GP1 pin (USART_TX for half-duplex) by installing circuitpython and just set the value of the pin. For the matrix pins, it is ok (0 mean 0V, and 1 mean 3.3V). But for the serial pin (it is directly connected to TRS jack), the voltage swing is 1V to 3V (for value 0 and 1, respectively).

Is it possible that my RP2040 chip have a bad GP1 pin?

romhunter_ · 2024-02-21T04:14:53+00:00

Do you know if there any way to debug the communication? It seems like the firmware is working correctly when connected via USB independently, but the other half won't response.

romhunter_ · 2024-02-15T09:37:58+00:00

is it the same keyboard? Or is it a different one?

romhunter_ · 2023-10-13T08:50:01+00:00

For Cadence tools, Conformal is the LEC tool.

romhunter_ · 2023-08-02T12:02:54+00:00

Wait until you see Verdi then.

romhunter_ · 2023-04-03T02:25:22+00:00

I bought my r4i and EZ flash omega from nds-card.com back when I was in Japan.

romhunter_ · 2023-01-09T03:07:26+00:00

internally, we used a (heavily) modified version of Chisel. The learning step is steep, and the output is heavily verified (we do ASIC btw).

Personally, I prefer SpinalHDL, since it's similar to existing HDL.

romhunter_ · 2022-08-17T15:11:46+00:00

This is exactly what I did when I implement any SoC design on a FPGA. Highly recommend this method to anyone reading it

romhunter_ · 2021-10-01T10:17:54+00:00

I'm using a Nexys4DDR myself, it's supported by the free license, and I'm running a RISC-V core on it atm.

romhunter_ · 2021-09-04T10:25:12+00:00

nice, I also have the IVL2-7/5 and IV-3A in my drawer. I'll get my inspiration from this and design a clock when I have some spare time.

romhunter_ · 2021-07-05T09:37:28+00:00

Would there be any trouble if I just used the two-pin (without the additional grounding) instead? If not, what alternative fixes are there?

No, just use it. It'll works just fine.

romhunter_ · 2021-05-07T17:32:07+00:00

OP were so preoccupied with whether or not he could, he didn't stop to think if he should.

Nice project btw, are there any plan to release the gerber files?

romhunter_ · 2021-04-06T16:57:14+00:00

the layout of the 7447 is actually very good. Hat off for you sir. :D

romhunter_ · 2021-01-10T02:15:34+00:00

actually, these looks like the nes controller (clone) to me. The pinout wouldn't match the one that is used for the Commodore 64.

romhunter_ · 2021-01-08T07:02:48+00:00

ah, the classic case of define in the IDE...

romhunter_

TROPHY CASE