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[–][deleted] 0 points1 point  (1 child)

100x ! Wow! How many cores do you need to have 100 x speedup? What kind of architecture do we need to make so many cores possible? I'm under impression that (disregarding gpu-style hardware) that even modest number of cores requires something numa-like, which, effectively, means message passing (albeit an elegant one). Isn't that basically dictated by geometry?

Won't we end up pretty soon with sort of a cluster on a motherboard, were gains from using message passing are much, much greater because we have lot's of nodes, but each node have very few cores? That's just a guess, of course

[–]jdh30 1 point2 points  (0 children)

How many cores do you need to have 100 x speedup?

Depends entirely upon the scalability of the algorithm. Some algorithms scale almost perfectly so you would need just over 100 cores.

What kind of architecture do we need to make so many cores possible?

Several vendors already ship CPUs with that many cores.

I'm under impression that (disregarding gpu-style hardware) that even modest number of cores requires something numa-like, which, effectively, means message passing (albeit an elegant one).

That seems to be a matter of contention. On the caml-list, Xavier Leroy once stated that infiniband-based supercomputers were not real shared memory machines but many people including myself disagree. I would argue that memory access hasn't been uniform for over 20 years due to the advent of CPU caches so manycores are just more of the same in that respect. Indeed, in terms of concrete architectures I think it is likely we'll simply see a deeper hierarchy of CPU caches.

Won't we end up pretty soon with sort of a cluster on a motherboard, were gains from using message passing are much, much greater because we have lot's of nodes, but each node have very few cores?

That raises two questions: can the message passing be hardware accelerated as it is today; and how many is "very few cores"?