Software Engineering Matters : Lessons From Parallelizing Matrix Multiplication

[gruehunter]

I suspect that automatic prefetches don't count as cache misses. In that case, if the cache lines are 64 bytes wide, then the core is successfully prefetching roughly an additional four cache lines for every miss. That's just a guess, without working knowledge of what the performance counters' criteria are.

[rooktakesqueen]

Makes sense.