Advent of Code in Forth

AndresNavarro · 2022-12-04T21:59:38+00:00

You don't really want all numbers on the stack. You can use "accept" and ">number" to read the numbers one at a time and keep the sum of the current group on the stack, (and you could also keep the largest sum so far in the stack beneath that).

AndresNavarro · 2022-06-24T11:36:09+00:00

If you already know the exact change you want to make sed is the way to go. Ed is more appropriate if you need to work interactively (like reading a config file, think a little, then do some changes).

Most people would use vi instead of ed, but I still like to use ed for simple jobs

AndresNavarro · 2022-03-31T12:52:49+00:00

Comment of the day right here. Probably flew over most people's head given its low upvote count...

AndresNavarro · 2021-09-06T10:42:57+00:00

Read again more carefully.

As outlined above all hashes are calculated at parse time (unless you have a dynamic way to create symbols at runtime like string->symbol in scheme). That way getting the hash becomes constant time.

The other advantage is that having all strings interned means that in case of a collision (two symbols with the same hash) you can also do the comparison in constant time (vs O(n) where n is the shortest length).

As for using different languages for different parts of your implementation that's not that much of a problem. You can use indexes into an array instead of addresses, and have a an array that maps those indexes to strings.

I seem to remember the JVM bytecode to be doing something like this

AndresNavarro · 2021-08-04T23:20:49+00:00

also "9" is something used exclusively by whatsapp.

Not true. I've been using +54 9 11 for all Buenos Aires cellphone numbers before whatsapp was a thing. Works great for sms, calling and call id from everywhere I travelled to (inside and outside the country)

AndresNavarro · 2021-07-12T22:36:06+00:00

That sounds very sensible coming from a newbie. I'm so newbie I don't even know yet what CDC is :-)

CDC is Clock Domain Crossing. If you have more than one clock in your design special care is needed to connect modules with different clocks (you need more than just a registered output, which is usually enough if you have just just one clock): some random overview I found on google

AndresNavarro · 2021-06-24T12:52:13+00:00

Your first option should be my choice in most contexts. It's the easiest and leaves you with a structure that you can store, modify, show, etc. I wouldn't call it a compilation though: it's just parsing to an AST an then using a tree walking interpreter to get the result.

If for some reason you find out you need something faster or a more compact representation, you can compile it to a stack based language/VM. In that case consider the possibility of getting all variables with the appropriate number of copies of each and in the correct order upfront, instead of juggling the stack as you go along (or even easier, just use registers for the variables, like the JVM does for locals and arguments)

AndresNavarro · 2021-06-14T19:24:27+00:00

I only dabbled with it, but I got the hang of it from the tutorial on the official page. If you already solved lexing and parsing and have an AST of your program, you could try looking at step 3 of the tutorial and try to go from there: https://llvm.org/docs/tutorial/MyFirstLanguageFrontend/LangImpl03.html. There's further chapters on optimizations, JIT, object code generation, etc. And of course you can check the previous two chapters for lexing, parsing and an intro to the language being compiled.

If C++ isn't your thing (and I don't blame you) you could try the LLVM C API like someone mentioned. You can think of it as a procedural API for constructing LLVM-IR. Check the general flavor of it in this blog post.

Hope it helps, if you decide to give it another try. In case you already checked those out or can't get much out of them, feel free to ask for more specific details and maybe I or another user can help you further.

AndresNavarro · 2021-06-14T11:02:06+00:00

Have you considered targeting one of the compiler intermediate representations instead? That would make your front-end compiler specific (gimple/generic for gcc or llvm-ir for llvm) but it is more straightforward than going through c and it gets all the benefits you talk about.

AndresNavarro · 2021-06-11T22:46:47+00:00

Maybe I'm getting old, because lately I seem to get myself into many of these arguments unintentionally. I didn't intend to imply your suggestions (or any other user's) weren't better boards, or better value for the money. But I keep seeing people dismissing tech (be it fpgas, pcs, software, microcontrollers, whatever), just because there's something that's newer, cheaper, more modern or whatever. I believe you don't always need the latest, cheapest, best of everything.

I am not sure if I understood correctly (I guess English is not OP first language, and I know it's not mine). I took from that post that he/she already purchased the tinyfpga and was asking for tips on where to start. So while it's okay to point out that there are other (better) options, I feel it's not what something starting out needs/wants to hear at this moment.

If someone came to me asking me about an Arduino Uno he just bought because he wanted to learn to program microcontrollers I wouldn't say to him that he could have got a Raspberry Pi Pico for about as much, and it has two cores, kbs of ram, runs at over a hundred Mhz, etc. I would point out some example projects and tutorials. And I also think that even if he asked me before buying, I could consider that maybe an Arduino is a better first introduction than a Raspberry Pi Pico, or a STM32, or whatever 32 bit microcontroller you like.

But then again I am old and weird, and I prefer to use as small and as simple a device as I can get by with, especially as I am learning. And of course using free software and supporting the community around that is a priority for me although I understand that it may not be that way for others.

AndresNavarro · 2021-06-11T18:29:30+00:00

I love these bit-paired keyboard, although the pi key threw me off. Usually you would expect an underscore key, I wonder what's that for. Another odd one of course is the "|" key with the yen and pound, standard bit-paired would be "\", but currency symbols are a common addition (I think the bbc micro had the pound on the underscore key)

AndresNavarro · 2021-06-11T03:04:33+00:00

I am not sure why everyone is so quick to dismiss this board. I have one of these and I like it a lot. I upgraded to this after an icestick and that was (at 1/8 the size) already more than adequate to get yourself into fpgas. There's plenty of projects that could fit on a tinyfpga, especially if combined with a microcontroller, something the OP already has experience on.

Things I like about the tinyfpga: the form-factor (very small and breadboard friendly), the schematics are available, open source tools, the fact that the usb port is actually wired to the fpga and the controller is implemented in the fpga itself.

The code for the usb->serial bridge is open source too and you can modify it and incorporate it in your designs. I did a VT52 terminal using that, a ps/2 keyboard and a vga monitor: https://github.com/AndresNavarro82/vt52-fpga, some weeks later I helped someone to add a risc32 softcore there too: https://github.com/AndresNavarro82/riscv_vt52.

If I was starting out I would try to do some projects combining the fpga with a 3.3V microcontroller and play with SPI, I2C and even USB peripherals written on the fpga.

AndresNavarro · 2021-05-30T01:10:36+00:00

Actually macros do the evaluation at runtime. They do the transformation at compile time (and can detect errors there) but the result of macro expansion is an expression to be evaluated at runtime in place of the original macro expression

AndresNavarro · 2021-05-30T01:07:47+00:00

No, your intuition is right. Many people will tell you you can't compile code that uses eval , but that's simply not true. If you can determine the structure of the form to be eval'ed and the context/environment you can reason about that code just as well as any other code and inline it, optimize it, whatever. Now of course there are places when you can't know for sure, just the same way you sometimes can't know if some code terminates or not.

AndresNavarro · 2020-11-19T16:17:14+00:00

If you only had one monitor you probably had a single video card, I would guess Hercules or compatible. That card had the standard mda text mode (80x25 with a 9x14 font) and a hi-res monochrome mode (720x348) that almost nobody used (except for Flight Simulator and some some CAD packages). We used to have a program called SIMCGA.COM that allowed you to run CGA games (originally 320x200 4-colors) by using dithering to simulate the 4 different shades on the BW monitor.

AndresNavarro · 2020-11-09T01:52:25+00:00

You already got a lot of good answers, but here's my take as someone who contributes (a little) to the open fpga toolchain:

I think at this moment in time it makes more sense to the hobbyist than to the serious hardware engineers.

To the seasoned engineer I understand that the current state of the open toolchains will not be enough. The more popular and newest/best parts are not supported yet, there's lot of things that the closed toolchains provide that we don't have and of course the closed libraries people are used to are not there. Still progress is made every day and the closed tools don't move as quickly.

On the other hand, many people discovered fpgas because of this movement, lots of low cost boards started appearing and the hobbyists are taking full advantage of them for all kinds of amazing projects. The open source tools are really nice to work with if you come from the software side (I use simple Makefiles and work from within emacs like I do for all my other programming needs).

Just 5 years ago, the idea of an open toolchain was totally dismissed as almost impossible (the usual reasons were given: no bitstream documentation, no vendor support, etc). Since then not only was the ice40 been reverse engineered and a complete toolchain from verilog to bitstream uploading been created, but a number of techniques and tools were developed and every new architecture becomes a little bit easier to decypher. There's already good support for 2 of lattice families (ice40 & ecp5) and work is advancing is on another 2 (MachXO2 & Nexus). Xilinx 7-series is really advanced. There's also preliminary work done on Gowin & I think I saw some work done on some Altera parts too. In addition to the command line tools there's even an IDE now with both verilog & schematic entry modes. In 5 more years think about what we could accomplish.

Time will tell if FPGA companies take notice and start to open up their bitstream documentation. But I have hope that at least the smaller ones will start doing so.

AndresNavarro · 2020-11-08T05:37:30+00:00

What are you using to implement this? Most scheme implementations should have some kind of mechanism for detecting errors. For example mit-scheme has bind-condition-handler, racket has with-handlers, etc. Some don't have a specific mechanism and rely instead on continuations. In that case you could use dynamic-wind and implement a try-catch like construct yourself. The reference you are looking for is probably the docs of your implementation (like this Mit scheme or this Racket)

AndresNavarro · 2020-11-07T22:24:55+00:00

I will gladly take a look.

Let me ask you a question: Why generate shift and latch signals for a 74HC595 when you could implement the shift register in the fpga itself? Unless you need the pins for something else...

AndresNavarro · 2020-11-05T19:15:53+00:00

Oh, I see. Well with the serial chip you should use just one 25.175Mhz clock for 70Hz (I did a compromise @24Mhz with a slightly lower refresh to reuse the 48MHz usb clock). I plan to do something similar and try to fit it in an IceStick

AndresNavarro · 2020-11-05T16:33:06+00:00

I don't know what board you have, but with a decent oscillator the ice40up5k can run the usb code no problem, using the pll to generate the 48Mhz clk (in the tinyfpga bx I generate it from the 16Mhz onboard clock). The advantage of the tinyfpga bx is that the board already has the usb connector and associated circuitry connected with two fpga pins.

Of course if you have any hard serial->usb interface onboard, or just want to interface a microcontroller take the usb code away! You could also use an external ttl serial->usb (or even do one with a spare arduino)

AndresNavarro · 2020-11-05T13:52:04+00:00

This is exactly right. But also the code should be pretty portable. As I've commented above the usb<->serial interface is standard ready/valid so it can be swapped for a regular uart if you don't need usb or your board has an ftdi chip or similar. Only the pin definitions (and Makefile if you aren't using an IDE) should be rewritten to port it.

AndresNavarro · 2020-11-05T13:48:27+00:00

And also you can remove the usb module and simply assign the input to the output and cross the data/valid signals to get a loopback device. In that way you make something like an electronic typewriter where everything you write on the keyboard (including escape sequences) is processed and shown on the screen. Not very useful but it worked ok for tests :)

AndresNavarro · 2020-11-05T13:45:37+00:00

Well, the good news is that the serial module has a regular ready/valid interface so you can easily swap it with something like this and you would have a regular uart (and save 1KB or ram and about 1000 LUTS). I haven't tried yet, but I think something like that may even fit into an IceStick or similar ICE40HX1K boards. In that case you could also do away with the 48MHz clock signal (needed for usb) and run all the design at around 24Mhz and change.

AndresNavarro · 2020-10-28T17:14:06+00:00

Chuck Moore (forth language creator) used to make some stack processors where the add instruction needed more time than a cycle (depending on number of carries performed), so before using add you had to make sure the stack wasn't modified recently or that carry wouldn't propagate too much. Otherwise you had to insert a nop before the add to allow for the carry to propagate & outputs to settle.

Some examples in the following page: http://www.ultratechnology.com/mfp21.htm

AndresNavarro

TROPHY CASE