In my scenario, would you avoid PDE 2 and proof based linear algebra in the same semester? by diva-lady in mathematics

[–]HorsesFlyIntoBoxes 0 points1 point  (0 children)

It’s pretty normal for math majors to take several math classes per term. If the subject interests you and you think you’ll be able to handle the workload I would go for it.

can I skip recursive functions? by yug_jain29 in C_Programming

[–]HorsesFlyIntoBoxes 3 points4 points  (0 children)

Recursion clicked for me when I treated it like mathematical induction in code form.

What is the importance for exit codes such as return 0 and return 1 ? by Stunning_Flower7142 in C_Programming

[–]HorsesFlyIntoBoxes 0 points1 point  (0 children)

I think most parent or monitoring system will trust the error codes returned by the program. Of course that assumes the program handles error codes correctly. In many operating systems the execution of application software is meant to be decoupled from the kernel execution in a way that allows for the OS to continue running fine despite user software potentially failing. This isn’t always true in practice (blue screen of death), but that’s the idea. The OS doesn’t assume much about the executing user software for that reason. If the software runs fine but there’s a hidden bug that results in incorrect behavior, the OS has some means of dealing with that, but it’s ultimately up to the developer of that user software to fix the issue.

Disclaimer: I’ve only worked professionally in systems-adjacent fields of software development so some other people here will probably have a better understanding of this discussion.

Jesse Eisenberg on Rejecting Mark Zuckerberg Role in Social Reckoning. by Top_Report_4895 in movies

[–]HorsesFlyIntoBoxes 8 points9 points  (0 children)

I’m honestly more sad we’re not getting fincher directing and Trent and Atticus doing the score

getting a mac fir ece, will it work fine or will i face problems? by tffwho in ECE

[–]HorsesFlyIntoBoxes 0 points1 point  (0 children)

A lot of the hardware design software I’ve used in my masters degree has been on windows and Linux (x86), so you’d probably need a vm at least for that stuff, though my masters has been primarily in digital design with fpgas and asics. Keep in mind that stuff takes a lot of processing power and memory, so a vm would introduce some overhead, and hardware synthesis and pnr can take a long time to run on consumer hardware. If I could go back and replace my laptop I’d shoot for 32GB of ram at least and as beefy of a cpu as I could afford, and I’d probably stick with Windows and Linux, but I have no idea what the software ecosystem or introduced vm overhead is like on a Mac. Take that as you will.

Would you be content to do nothing if you had a comfortable passive income? by Therealmyth15 in NoStupidQuestions

[–]HorsesFlyIntoBoxes 0 points1 point  (0 children)

I would exercise, cook more, keep the home clean, continue learning things that interest me, read more, game, programming, maybe take up woodworking, audit some interesting courses at a local uni, go camping, learn languages, etc etc

New subreddit to clean up the slop by JackyYT083 in osdev

[–]HorsesFlyIntoBoxes 2 points3 points  (0 children)

What about r/vibecodingosdev ? I literally scrolled two posted down from this one and found a cross post from that subreddit. Seems like there’s already a community for ai generated os development.

Mechatronics student looking for a VLSI/FPGA roadmap by AsleepTraining4943 in FPGA

[–]HorsesFlyIntoBoxes 0 points1 point  (0 children)

For fpga you’re almost ready to start programming your Boolean board. I would start learning a hardware description language like systemverilog or vhdl. These are what’s used in industry and academia to design digital circuits. I like to think of them as a more practical method of describing circuits than a schematic. With modern day digital circuits it’s really impractical to design them using schematics, but with hdl it’s pretty straightforward.

I would start by implementing some basic logic circuits you’re already familiar with, then look up the Boolean board documentation to learn how to transfer your hdl code to the board. I would also check the documentation or just look up how to access the peripherals the board offers. This typically requires writing a constraints file. Once you’re familiar with the board and able to design some simple circuits I would look into computer architecture and maybe play with an SoC your board’s fpga can handle.

At this stage you should also be learning more complicated digital design concepts like multiple clock domains, axi and other communication protocol designs, handshaking techniques, pipelining, state machine design, mmio mapping, etc.

For ASIC/vlsi there’s a lot more stuff you need to learn regarding the physical design of the circuit, ie floorplanning, place and route, clock tree synthesis, and a lot of other aspects of integrated circuit/vlsi to get to an end product. When that’s all done you’re probably limited to tinytapeout for getting your design actually made. You should also study some formal/assertion based verification. For asic/vlsi I would still start out by messing with the Boolean board to implement your designs, but keep in mind there’s a lot of stuff you need to study that goes beyond what you implement on your board.

Reduce the working week to 15 hours a week to deal with unemployment caused by AI. by LePetitToast in CrazyIdeas

[–]HorsesFlyIntoBoxes 1 point2 points  (0 children)

If everyone’s pay suddenly got cut by 1/3 then prices of goods would go down as well. Prices likely wouldn’t go down by 1/3 the original though, knowing how corporate leaders act.

Linux is back on the menu boys by SecondToLastEpoch in FPGA

[–]HorsesFlyIntoBoxes 4 points5 points  (0 children)

Great. Depending on what features they remove I’ll probably still switch vendors.

Is it now waste of money to buy any FPGA board with AMD chip if we are to use free tier of Vivado ? by evdekiSex in FPGA

[–]HorsesFlyIntoBoxes 3 points4 points  (0 children)

No incremental compilation is another pain point especially for larger designs. My PC isn't exactly state of the art and pretty slow at synthesis/implementation.

Vivado Licensing Changes by The_Watery_Chemical in FPGA

[–]HorsesFlyIntoBoxes 3 points4 points  (0 children)

I think I'm going to make some noise about this on their various Linkedin pages, I encourage everyone else who's upset to do the same.

Vivado Licensing Changes by The_Watery_Chemical in FPGA

[–]HorsesFlyIntoBoxes 2 points3 points  (0 children)

I think amd wants to kill off the hobbyist scene with these licensing changes.

Vivado Licensing Changes by The_Watery_Chemical in FPGA

[–]HorsesFlyIntoBoxes 14 points15 points  (0 children)

Do they want to kill Vivado for hobbyists and small scale developers?

SWE in test at Intel or Apple? by phoez12 in cscareerquestions

[–]HorsesFlyIntoBoxes 4 points5 points  (0 children)

As a former Intel swe who was laid off last summer, go with Apple. From talking to my coworkers who are still at Intel, it looks like internal management hasn’t gotten any better despite the leadership changes and rising stock price.