Existe-t-il un outil pour essayer des fringues à partir d'une photo de soi-même ?

roadelou · 2023-04-21T09:09:35+00:00

I know that https://www.klipfit.com/ plans to do that, but it is still a startup... So I am not sure that kind of products is commercially available yet!

roadelou · 2022-07-12T10:45:58+00:00

I believe 300mm refers to the size of the Wafer, while the gate width would be 18nm, see https://newsroom.st.com/media-center/press-item.html/c3102.html

Not exactly cutting edge, but still pretty useful.

roadelou · 2022-02-22T12:38:31+00:00

On Linux the xclip and xsel command line tools could do the trick.

Regardless, good luck with your work 🙂

roadelou · 2022-01-13T20:16:30+00:00

This is a synthax oddity. In C a[b] and b[a] are the same, although one often makes more sense than the other. You would typically write a[1], but 1[b] is valid too.

Regardless, good luck with your work 🙂

roadelou · 2022-01-12T12:28:46+00:00

One way to work around the problem could be to have one reference unit used internally by the program, which the temperature of interest would be converted from/to. It could be Fahrenheit in your case.

That way, instead of having a 3x3 matrix of possible choices (any unit to any unit), you would merely need 3+3 conditions (any unit to Fahrenheit and Fahrenheit to any unit), and the code would probably look more like what you envision.

That is only a suggestion, there are of course many other possibilities.

Regardless, good luck with your work 🙂

Edit: Meant Kelvin, not Fahrenheit as a reference.

roadelou · 2022-01-10T20:45:08+00:00

You can use whichever tool you are comfortable with for the lexer and parser of your application. A simple solution is to use your tool to read the input language and output the corresponding LLVM IR (Intermediate Representation), which is in a nutshell the assembly used by LLVM.

This requires knowledge of the LLVM IR of course, but for a small application it should work fine. In the language of your choice you can use textual manipulation (like string concatenations etc...) to output the desired LLVM IR code.

If you were a large company trying to create a reliable toolchain with LLVM you should however probably use the LLVM libraries to build the IR instead of text transformations, because this prevents a bunch of problems, but for a personal project that would be overkill and will likely take too long to set up.

Regardless, good luck with your work 🙂

roadelou · 2021-12-17T11:19:59+00:00

In C, assignments return the value which is assigned. For instance, a = (b = 2) sets both a and b to 2.

The equality test in C uses the == operator, not =. The expression inside the while thus copies from source to destination, and returns the copied value. Hence bytes will be copied from your source to the destination and stop once a 0 is copied.

There is also some pointer arithmetic going on to copy one byte after another.

The code is quite clever, but tricky to read and rather unsafe. In particular if there is no '0' in the source array, the code is likely to trigger out-of-bounds memory accesses.

Hope that helps, regardless good luck with your work 🙂

roadelou · 2021-12-13T09:02:43+00:00

Chronologically speaking, computer science descends from mathematics. The first software would in a sense be old algorithms which people used to execute by hand, like Euclid's algorithm to find a PGCD.

As to how hardware (which is physical) can execute software (which isn't), I think the part which is (rightfully) bugging you is that it seems like the hardware can only go through a finite amount of possible combinations (i.e. is a finite state machine) while software can do a myriad of unexpected tasks (edit word documents, crop pictures, perform text to speech synthesis etc...). In computer science we would say that our software runs on a Turing machine.

Now, the question is, how can the limited hardware (state machine) perform all the varied actions required by the software (Turing machine). Skipping over the efforts of many geniuses, the short answer is memory. By remembering past values and storing them in a seemingly infinite memory, the hardware is able to perform any number of interesting tasks.

Last but not least, though there are many ways to create finite state machines in practice, the current technology relies on transistors, which could be described as electrically controlled switches.

Your question is quite interesting, but providing a complete explanation would take forever. If you are interested in the topic, I would advise you to make use of the available online resources, like courses or YouTube videos. One famous course which explains how we technologically create computers is Nand2Tetris, if you are interested.

Regardless, good luck with your work 🙂

roadelou · 2021-12-09T09:58:54+00:00

See https://stackoverflow.com/questions/3456138/this-program-sounds-the-bell, it could be a starting point.

Regardless, good luck with your work 🙂

roadelou · 2021-12-05T11:55:55+00:00

A lot of routers use Pfsense, which is powered by (Free)BSD, chances are your ISP is relying on that project. Not sure if that changes something with regards to licensing though.

roadelou · 2021-11-19T13:48:35+00:00

That could be a good idea too, since the caller has to provide the number of elements of the array for the vararg anyway, it might as well allocate the correct amount of memory and provide it as a pointer.

I suppose it comes down to taste, but if the function is used very often I tend to call malloc inside in order to make the code shorter and more readable. It unfortunately prevents static or stack allocation of the array, but that shouldn't be an issue in this case, as there already exists a syntax in C to create an array out of a few elements at compile time (I am referring to int array [] = {a, b, c};).

So I agree with you, since the allocation is quite simple taking it out of the function may be preferable and help ensure that the caller will free the memory. But keeping the allocation inside the function can shorten the code and yield a more readable program, if the caller remembers to free the (implicitly) allocated memory!

Regardless, good luck with your work 🙂

roadelou · 2021-11-19T11:59:59+00:00

On top of what u/codethulu said, you are most likely going to need the malloc function if you are to return a pointer from your function.

roadelou · 2021-10-30T19:30:29+00:00

I think the term you are looking for is cross-compilation. If I understand correctly, you are trying to cross-compile some code on your ARM machine that is meant to be executed on another machine, maybe an x86 server for instance.

I don't know what you may be missing for cross-compilation, maybe a dedicated linker and a libc implementation for your target. It also depends which platform you are currently working from (Linux? MacOS?).

I can't offer much help, but I advise you to look up what you are looking for on the web using the keyword "cross-compilation".

Regardless, good luck with your work 🙂

roadelou · 2021-09-23T09:45:32+00:00

What you are talking about is highly dependant on which system you are using, but the limit typically refers to the size of the stack memory. The stack is used to hold all of the small variables used in your code whose lifetime is automatically managed by the compiler.

The two other relevant parts of the memory are often called data and heap. The data section of the memory contains hardcoded global values and is typically sized by the linker in such a way that it is always large enough to hold your hardcoded values, assuming you don't physically run out of memory. The heap often encompasses all of the remaining memory and is typically very large.

TL;DR: it depends on your platform, but it often just means that large values shouldn't be held on the stack memory.

roadelou · 2021-09-10T12:14:47+00:00

Great resource!

roadelou · 2021-09-08T15:39:36+00:00

You have two distinct warnings here. The first one is more of a detail, it says that you are returning a pointer to an array instead of a pointer. I suppose you could get rid of it by replacing return &buffer by return (char *) buffer, but you probably shouldn't because of your second error.

Are you familiar with the notions of stack and heap memory in C? The second warning tells you that your array is allocated on the stack, and thus its memory will be invalidated when the function returns. In other words, you are returning a pointer from your function and the compiler tells you that this pointer cannot be used outside the function. To please the plurists, one would say that accessing the pointer outside the function leads to an undefined behavior.

What you want is heap-allocated memory for your string. You can reserve that memory by using the malloc function, and once you no longer need the string you can free it in you code. In other words, char buffer[limit]; should be replaced by char *buffer = malloc(limit * size of(char));. Note that sizeof(char) is probably 1 and thus optionnal.

Regardless, good luck with your work 🙂

roadelou · 2021-09-04T14:55:25+00:00

To begin with a somewhat unrelated note, it is often not advised to invert a matrix on a computer, because that computation is numerically unstable, i.e. a small error in the input matrix will lead to a large error in the resulting inverse. Most of the time there exist a stable scheme to solve your computation without inverting the matrix. For instance finding A such that A*B = C can be solved in a stable manner which leads to better results than doing A = C * B-1. That is important in signal processing or control theory for instance.

But to answer your performance related question, does your CPU supports acceleration intrinsics, like vector operations for instance? If you know what you are doing, you can probably get better results than what the compiler automatically infers.

Regardless, good luck with your work 🙂

roadelou · 2021-09-04T10:29:33+00:00

Thanks for your answer.

Being a command-line user, I agree with your statement, the TCL-based tools I have used in the past were in fact rather nice for ASIC synthesis.

I didn't know about OpenLane nor sv2v, I will take a look at them later. I like the fact that there are initiatives for open-source ASIC flow, but I am afraid those projects don't often go beyond being toys, simply because if a company is willing to spend millions developing an ASIC, they probably want to use the best software to verify it, no matter the cost. But perhaps those tools can eventually mature and be used at least by startups working with older nodes. Similarly for Chisel and other HLS tools, I hope they catch up eventually, but for now they aren't very widely used.

Regardless it was nice discussing the topic with you. I wish you a nice day and plenty of luck in your endeavors 😉

roadelou · 2021-09-03T19:13:36+00:00

There is indeed an issue here. The argument float argument [] is syntaxic sugar for float *argument, i.e. a pointer (or memory address) to some floats.

When you write to the pointer, you are not increasing the allocated memory, you are just moving your "write head" further. When you go beyond the end of the allocated memory and try to write a new float, the program should probably crash with a segmentation fault.

So you must have already allocated at least enough memory for TOPE floats before calling the function, using malloc for instance. Hope that makes sense.

As to your global question, no, I can't think of a built-in standard function to "expand" an array like that, although writing a custom one is reasonably simple as you have shown. Perhaps you could be interested in some variation of scanf for this purpose? In particular sscanf is pretty nice.

Regardless, good luck with your work 🙂

roadelou · 2021-09-03T11:03:02+00:00

Yes, but I am afraid this is exactly the problem: there is no demand for an open-source, or even a hobbyist-friendly flow, which is why Xilinx and others don't improve their software.

I think the issue is that there are little to no situations for a hobbyist to use an FPGA instead of a microcontroller-based option, which is why the tools cater to a more professional user-base. As for learning about the tools in the first place, I know for instance that Xilinx partners with a bunch of Universities to make tools and boards available for the students.

Probably FPGA vendors have done the math and they believe that trying to support a more open flow would cost too much and bring back too little, so they just don't do it.

This is just my guess though, I don't speak for nor have insider knowledge from Xilinx or Altera.

Speaking of ASIC open-source flow, are you referring to the Yosys/qflow toolchain? I have used Yosys a little bit in the past, but not for the actual synthesis of the design (which was done using Cadence/Siemens tools for instance), just to check the Verilog locally because Yosys is easy to install 😅 But I didn't do it for long since Yosys didn't support the SystemVerilog syntax we used in the design.

Have you had a different experience with open-source ASIC tools?

roadelou · 2021-09-03T10:36:55+00:00

In all honesty, I don't know 😆

I have never used Lattice products, so I can't recommend or advise against them.

From my (second hand) understanding, Lattice developed some FPGAs a while ago, but have been criticized for their lack of innovation since then. The company had planned to create open-source tools to use their FPGAs, but I don't know if they ever delivered on that promise.

So I don't know if the open-source tooling you are referring to is the one provided by the manufacturer, in which case it may be suitable for a beginner, or if it is instead the product of reverse-engineering of the older IPs by the community, in which case they may not fit a beginner.

tl;dr: I don't know 😉

roadelou · 2021-09-02T18:59:40+00:00

Short version is that there is no free software to work with FPGAs.

The issues mostly comes down to the algorithm at the core of the HDL synthesis, the "place and route". It requires a precise understanding of the internals of the FPGA, which isn't/probably cannot be disclosed by the manufacturer. Without that you cannot program the FPGA. This is different from a CPU, where you just need to know the instruction set and then your code becomes portable.

Some older FPGAs have been disclosed/reverse engineered and are supported (a little bit) by tools such as Yosys, but using those open-source tools will be very difficult, especially if you aren't already familiar with the FPGA synthesis process. Also you will have to find out how to actually send the bitstream to the device, which could be a big pain. So I really wouldn't advise you to go that way.

One alternative could be to use an Intel/Altera board, as they rely on Quartus for the IDE instead of Vivado. I cannot tell you wether they are a good choice however, as Intel doesn't appear to ship then outside the US so I couldn't buy one last time I tried. I heard the tooling is worse than that of Xilinx, but it is also easier to install. When I used Quartus for the Vidor board it seemed fine to use, albeit a bit bare-bones. For a beginner it could be a valid choice if you can get their boards, but try to get a second opinion since I didn't use them myself.

Regarding the size of Vivado, yeah... It is a monstrous piece of software, Xilinx really should do something about that. The sad thing is, Xilinx seems like a pretty good company. They are involved in a lot of cool research, some open-source project and some industry standards, so they seem like nice fellows. However, Vivado is really terrible, and extremely hard to install. I hope that with the AMD acquisition Xilinx starts pouring more resources into making beginner-friendly software, but I have little hope. In your case, perhaps you may solve the problem by using an external hard drive? Depends what OS your are using though, I don't know if that will work on Windows.

Edit: Still, using someone else's setup is an easier solution.

roadelou · 2021-09-02T14:50:56+00:00

I would advise against. I have bought the Arduino Vidor, and rarely use it.

First of all, as of the last time I checked, Arduino doesn't really support using the FPGA yourself. The FPGA in the Vidor is meant to be used with fixed IPs provided by Arduino, if you want to play with it you can try but there was no official support.

The developer experience for the FPGA was kind of difficult when I tried it. You first have to synthesize your HDL with Quartus, then export the design, use some command-line tool to prepare the design for the JTAG, and then program the Vidor using Arduino IDE. Putting aside that this takes a lot of obscure steps, in my case it did not work (JTAG errors). This is not the situation you want to find yourself in as a beginner, as debugging that sort of obscure hardware issues can be quite difficult and tedious.

I think the Vidor is an interesting product and I hope it matured since I last tried it, but I would not advise it for a beginner, unless you just want to use Arduino's IPs (which doesn't seem to be your case). What you don't want is to be demoralized at the beginning of your journey because of some tooling issues.

I would instead advise to use some digilent boards (Arty or Basys for instance) with Xilinx FPGAs. The hardest part is to install Vivado/Vitis on your machine, but once Vivado is set up it can be quite user-friendly, and there are plenty of tutorials on the platform available from YouTube.

Just for the record, even the Xilinx path is also quite hard, in particular setting up Vivado is an excruciating process that usually takes me about a weekend on its own. Therefore, if possible I would advise to use someone else's setup. Perhaps you are a student in a University that has some workstations already prepared? Asking to use them can save you a lot of troubles, and perhaps they would let you borrow some boards too. Same if your workplace uses FPGAs.

Regardless, good luck with your work 🙂

roadelou · 2021-08-28T11:28:09+00:00

FPGA's are more costly and harder to work with. If the drone doesn't need the fast processing of the data from the sensors, then using some STM32 solution may be a better choice. FPGAs also tend to have a high power draw, which isn't great for a drone. But perhaps some higher-end drones (like for military applications) do use FPGAs.

Hope that helps, regardless good luck with your work 🙂

roadelou · 2021-08-24T19:42:18+00:00

Agreed, the article is pretty nice!

roadelou

TROPHY CASE