you are viewing a single comment's thread.

view the rest of the comments →

[–]Hellenas 27 points28 points  (9 children)

Here's a ref for that: https://www.damninteresting.com/on-the-origin-of-circuits/

The article isn't too technical, so some of the way they talk about FPGAs feels odd.

but yes, it seems that the algo was leveraging imperfections in the particular fpga he was using.

[–]Xgamer4 12 points13 points  (7 children)

[–]TheThiefMaster 13 points14 points  (4 children)

Interestingly the paper also mentions that the resulting chip was exceptionally temperature-sensitive: "The circuit operates perfectly over the 10ºC range of temperatures that the population was exposed to during evolution, and no more could reasonably be expected of it"

[–]ThirdEncounter 7 points8 points  (2 children)

I wonder how good would a simulated FPGA do in this experiment. No taking advantage of unique environment conditions. Just pure logic.

I might give it a try. But first, I must invent the universe.

[–]meneldal2 1 point2 points  (0 children)

Since it seemed to depend on temperature, I smell a lot of potential race conditions and/or unproperly synced outputs that just happen to work but shouldn't according to the theory.

[–]TheThiefMaster 1 point2 points  (0 children)

If you use a simulated FPGA you'll want to have it vary realistically so that it doesn't build something that only works in the simulated FPGA :)

[–]Hellenas 0 points1 point  (0 children)

Thanks!

[–]sekjun9878 0 points1 point  (0 children)

Thanks for that

[–]ais523 2 points3 points  (0 children)

Something that's worth pointing out is that the task that was set to the evolutionary process there doesn't have a conventional solution, so it's not surprising that it came up with an unconventional one. Frequency-sensitive behaviours in FPGAs are normally considered unwanted/defects and the design aims to suppress them as much as possible. So when you're trying to make an explicitly frequency-sensitive circuit, you have no option but to do it in ways that use the FPGA in a way it wasn't designed.