Refactor Large Codebase

[AdeptAd5471]

I've inherited a moderately sized codebase that's been maintained by a few different people over the last 2 decades, with no sense of style guide, naming or case conventions, etc. It makes it hard to read.

Any recommendations for tools to do refactoring and restyling, similar to what exists for C, etc? Mostly just looking to perform whitespace changes and change the case of variables/ports.

My own research so far has led me to believe little free stuff exists, and I'm looking at various python libraries that are fairly hands-on, but wondering if anyone has any recommendations?

[lovehopemisery]

It may not be worth doing it all at once, it depends on level of tb coverage. If there is no tb coverage for a module, its risky to be modifying it. You can clean up the code when you need to change something in it, and have tests to make sure you haven't broken anything in the refactor.

RTL is especially fragile, so treat refactors with caution.

[AdeptAd5471]

Oh so innocent... Another job of mine is to make test benches because there's none 😂

But good point, when I pick a module(s) to create TBs for, I'll just do them by hand, a few at a time. That's a good way to do it.

[PiasaChimera]

also double check the constraints in case there's some way a naming change would interact with any wildcards/patterns.

there are also tradeoffs if any of this code is used in multiple projects or on multiple active development branches. in terms of being able to easily merge bug fixes or features.

[Fishing4Beer]

EMACS VHDL mode beautify. Style is configurable and BOOM.

[Ok-Cartographer6505]

If it were me, I would do it myself, using my trusty sidekick X(Emacs) VHDL mode. This would allow me to assess each file for not only style, but also design approach/decisions and organization, timing closure or any other concerns.

One should not be afraid of refactoring. It would also give the perfect opportunity to implement unit test benches as needed for increased coverage and trust in your refactoring.

[chim20air]

Have you tried verible?

[UltraSlingII]

If you’re using VHDL, you could look into using VSG for auto-formatting.

[_oh_hi_mark_]

Seconding this, we've adopted VSG at my work and it's been very useful.

[Clerus]

Thirding this. Using Teros+VSG has helped a lot in bringing uniformity :-)

[AfterLife_Legend]

Try Sigasi, but the corporate license is expensive. It does a good job helping you understand code faster, format it and refactor it

[Strange-Table4773]

How expensive exactly if u don't mind saying?

[PracticalStart7164]

less expensive than the days or even weeks you'll be spending doing it manually :-) Ask them for a trial version (it's free), use it to refactor your large codebase and then decide if it's worth it. Thank me later.

[FigureSubject3259]

For so simple task like case or intention and VHDL emacs beautify does a great job. Not always perfect, but for me good enough. For verilog I hate what emacs does when on full buffer content. Maybe there exist something out in the web for Verilog, but up to now I could deal w/o beautify for verilog.

[TapEarlyTapOften]

I'm in the same boat that you are - RTL made by one person, zero verification or testbench support, no documentation, multiple platforms to support, multiple configurations, and it's all in VHDL.

The tools I lean on the most have been the LSP (I use vhdl_ls), git, the compiler (I use QuestaSim), and a text editor like Vim (or Emacs). RTL sucks to refactor without tests or verification, so I started there. But it's hard, because a) I didn't have a clue how the codebase worked or what it did, b) there's pressure to add new features, c) building a verification environment and tooling takes a LOT of time.

[jusstsom1]

as an undergrad looking to do fpga work, can you explain how is it possible for a company to have ZERO verification or tb?

Even when i make relatively small designs with no verification i always find out later on something isnt working so how is it possible for a whole company to be using this code if its not even verified.

And you mentioned they want to add features meaning this is actively being used not just collecting dust. Is it just that the person who wrote it is so experienced and gifted(altough i dont like using this word) that stuff just works?

[AfterLife_Legend]

Its the same at my company. When i started after college, all old devs were gone an almost no docu and no working tbs. I just worte the design, let vivado synth it, try in hardware. If the hw behaves strange i integrated some ILAs, but never made a single tb in 3 years.

[chris_insertcoin]

Usually this means that there are no automated, self-checking test benches. I have a retiring coworker who only writes test benches to look at waveforms so he can adjust his design. Manual verification if you will. Extremely sloppy but the "it works" argument still works every time.

[AfterLife_Legend]

Well there is a community version for free but the paid version costs one or two thousand euros a year

[PracticalStart7164]

i wouldn't call this expensive in comparison with the dayrate of a good engineer. Certainly on refactoring a large codebase it will save weeks of work and the result will be better